ensuring proper voltage at supply pins

with the numbers available on minimum and maximum voltage of the output of the regulator a list can be made to check whether all the ICs are getting supply voltage which is with in their standard operating voltages.
To calculate maximum voltage across the IC supply pin, assume current to be the least and assume resistance of ferrites and zero ohm resistors in series with the supply which suits between regulator output and IC supply as zero.

To calculate minimum voltage assume maximum current into IC and assume maximum resistance at extend temperature for both series zero ohm resistor and ferrites.

maximum voltage will be maximum voltage output of switching regulator.
minimum voltage will be supply voltage minimum minus drop across ferrite bead and series zero in jumpers and series resistance of connectors.

First time power on PCB

I do following tests before powering on PCB for the time:

1. have sufficient ESD protection in the testing area
2. Have a digital multimeter
3. verify that all the components are intact placed
4. all the DNIs - do not installs are not loaded
5. if the pads of DNIss are very close(0402, 0201 packages) there is a possibility of getting short when machine soldered due to process. Check those. Should not have DNIs such a small footprint ones ar first place
6. check all diode polarities are correct on board (can use multimeter to verify anode and cathode if diode marking is difficult to read on board)
7. check all ICs pin number 1 marking are correct with respect to board marking
8. Measure resistance at the input of power supply section. Should be in kilo ohms or mega ohms
9. if possible, isolate loads of all regulators by removing series component after the regulators such as ferrites or zero ohm resistors. So that when powered on due to some mistake if voltage generated is higher than expected by the regulator none of the devices will go bad
10. Have power cables tested
11. set the current limit to minimum in the bench supply as all the loads are isolated.
12. Power on and check that there is no much current being drawn then expected
13. measure voltage across feedback pins, pics and switching pins and check against expected values
14. Measure output of all regulator sections
15. test for minimum and maximum input range by changing the input voltage from minimum to maximum
16. once convinced that power section is fine, take a rheostat and connect it across the output of regulator sections and check the load regulation.remember that we have isolated the actual on board load to the switching regulator.
17. if power supply section is found stable for multiple on of cycles with minimum and maximum load, it's time to power in the board
18. measure one again the resistance at the load side, populate the series opened components
19. power on
20. measure voltage of all regulators outputs
21. if all values are found okay, than other activities like JTAG programming ICE Connecticut can be started

DC parameters description

VCC – Supply Voltage range. The device operation is defined only in this voltage range.
VREF – Reference voltage. Used to define the switching threshold of differential input devices.
VIH ­– High level input voltage. A minimum voltage required to detect the input voltage as logic high (in positive logic). VIHmin – can be considered for worst case analysis
Note 1: Unlike CMOS (which has very high impedance due to gate insulation resistance), bipolar transistors inputs will draw small amount of current through the input terminals when logic high voltage (VIH) is applied across the input. Higher the VIH , more the current that will be drawn by the Bipolar input
It is very important to maintain input voltage levels in valid range (>VIHmin for logic high and <VILmax for logic Zero) especially for CMOS. If not, the device may draw huge currents and may switch states randomly, generates high noise currents and power and ground surge currents or in worst case permanent device damage may occur

VIL – Low level input voltage, Voltage below this range at the input will be treated as logic zero (in Positive logic). For Most Bipolar devices, when a low voltage is applied at the input, certain amount of current will be sourced out. Lower the input voltage across the input, higher the sourced out current.
Note 3: In general, a device with VIH of 2.4 and VIL of 0.8 has a TTL compatible input. The devices whose input levels are scaled (0.7 VDD and 03 VDD) will have CMOS inputs

IOH – High Level Output Current, the current into an output with input conditions applied, establishes a high level at the output. CMOS devices will have limited current driving capability while output of logic high is produced. If the load connected to the CMOS output pin (LED) sinks more current, then the output voltage level starts to fall down since MOSFETs will be seen as low impedance resistors when turned on (Increasing current increases internal ohmic voltage loss). Hence the datasheet will say the maximum IOH that the device can source while still maintaining output voltage higher than the specified VOH minimum.

IOL – Low level output current, the current into an output with input conditions, establishes a low level at the output. CMOS devices will have limited current driving capability while output of logic low is produced. If the load connected to the CMOS output pin pull-up of very low value, then the output voltage level starts to rise since MOSFETs will be seen as low impedance resistors when turned on (Increasing current increases internal ohmic voltage loss). Hence the datasheet will say the maximum IOL that the device can sink while still maintaining output voltage lower than the specified VOL maximum.

The current out of the port is mentioned as negative value and current into the port is mentioned as positive value.

VOL – Low level output voltage, The voltage level at an output terminal with input conditions applied that, establishes a low level at the output.

VOH – High level output voltage, The voltage level at an output terminal with input conditions applied that, establishes a high level at the output.

IIH, IIL are input currents when logic high and low is applied to the input port respectively. For CMOS, the current will be a few µA.

Choosing Proper Ferrite beads

Choosing Ferrite Bead

Points to consider while choosing Ferrite beads for EMI suppression

• Ferrite bead is a frequency dependent resistor and the resistance of ferrite bead varies according to the frequency of signal passing through the ferrite bead
• Often Ferrite beads are the only solution for EMI problems
• Ferrite Beads with Low Q are absorptive beads - very lossy and hence absorbs the high frequency current noise and dissipates as heat
• Things to consider for choosing ferrite bead
• Unwanted frequency range of the signal flowing through the ferrite bead
• EMI source
• Expected amount of attenuation by the ferrite bead
• Electrical condition for the Design - DC Voltage, DC Bias currents, Maximum operating current, filed strengths etc
• Available board space to place the Ferrite bead
• Beads chosen without proper planning may become a source of EMI problems
• Often the impedance of ferrite bead drops to 20% of stated impedance when the current flow through the ferrite is high. The current saturates the ferrite and makes it to lose its inductance property
• AC resistance (Z) must be greater than the inductive resistance (X_L) of the ferrite bead. If this is not considered while choosing the ferrite beads, following problem in the figure is very common to occur:

Figure: Illustrating the negative effects of choosing ferrite bead without proper input

•  Refer to impedance chart of the ferrite bead. Normally, in the quick specification only at a spot frequency, the impedance value will be mentioned which is quite not a useful information. Referring to figure below, variation of impedance is so high though all spot impedance are the same (120 Ohms) for the 5 different ferrite beads.

Figure: 5 Ferrite beads with different impedance curves sharing common spot impedance value

CISPR 22 Limits for EMI/EMC test reference 

Table: CISPR limits for reference

References:

http://www.altera.com/literature/an/AN583.pdf

http://www.vishay.com/docs/ilb_ilbb_enote.pdf

http://www.digikey.com/Web%20Export/Supplier%20Content/TDK_445/PDF/TDK_InCompliance_Aug2010.pdf?redirected=1

Switch debouncing circuit for MCU Reset Pin

Check whether Reset Pin has internal Pull-up.
Always prefer to Pull it up using exernal resistors

Place a nominal value of 1 to 10 uF capacitor between ground and the Reset Pin. a 20 pF capacitor for ESD protection. Here it is assumed that Reset Pin of MCU is active low. It means, to reset the MCU, user has to give a low pulse (0 V) on Pin RESET for a specified duration. THe reset duration of MCU will be specified in the data sheet (Minimum). Always providing a reset until all power supplies have reached 90% of their nominal value is a good practice.

A resistor between power supply and RESET pin of MCU is required to delay in the reset pulse for the MCU further and also provides pull-up. The delay will be 4 times RC. A schotty diode with its positive terminal to Reset Pin and negative terminal to the Power supply will be helpful to kill out the positive going spikes which may occur during switch operation.

If space and price options are flexible, there are dedicated IC from Maxim, TI and other vendors which serves both voltage good detection and reset generation along with switch debouncing circuit, all in one IC.

Pictures to be uploaded.
waveform to be uploaded

Calculating LED series resistor Value

How to calculate value of series Resistor value?

Following are the the assumptions made in this post for example sake:

• Supply voltage - 12 V
• LED minimum forward voltage - 2.3 V ( From LED datasheet )
• LED maximum forward voltage - 3.1 V ( From LED datasheet)
• Maximum current allowed to flow in the LED - 20 mA ( Care has to be taken here by considering the maximum operating temperature, if relevant, as normally there will be a derating in the amount of current allowed to flow through the LED at higher temperature)
• Size of LED - Not applicable

With all the above assumptions, the resistor value can be calculated as follows:

R min = (Supply max - Forward voltage min)/ Maximum Allowed LED current;

Rmax = (Supply min - Forward voltage max)/10% of Maximum LED

 

RC delay in PCBs

RC delays are used to introduce a lag in the behavior of high speed signals such as SPI clock, Ethernet lines emmc lines etc. Some times RC are put in the circuit to have control over reflections and also to have minimum over shoot and undershoot.

To calculate delay inserted in the digital line,say SPI clock , for example, if a series resistance have been used of value 33 ohm and a capacitor near the clock input pin of slave SPI ( who receives the clock) of value 47 pf which are normal to see in many boards.. Delay is

5 * RC,
= 5 * 33 * 47
=~7.5 ns
it should be read as: SPI clock now takes an extra of 7.5 ns to reach low to high compared to previous case.
it follows from the same way that while reaching low the signal will take 7.5 ns more.. Some times, this will have impact on maximum operating frequency.. Too much RC is also not good as it increased the signal's include state for more duration causing more power consumption. There should be nice balance between minimum rc for signal integrity and maximum required operating frequency.
 

Series termination for SPI lines

Assuming both Master and slave SPI are CMOS devices. Few things to know about are the trace length of the SPI lines between two devices, Whether the master and slave are on two different boards, and maximum operating frequency, and rise time and fall time of the driver Pins (MOSI, CLK and CSEL on the Master and MISO on the slave). Series termination has worked quite well for devices on same board with the trace length of around 6-8 inches. Assuming driver internal resistance of 15-20 Ohms (if not available in datasheet), placing a 33 ohm standard resistor immediately next to the driver pins to match with the PCB impedance has been shown very much improvement in controlling reflections. Here a PCB impedance of 50 ohms was assumed. PCB impedance varies from board to board and a fine tuning can be done by changing the value of series resistor. Care should also be taken while measuring the overshoot, undershoot and reflections as some times the ground clip of the measurement probe if lengthier, the overshoot and undershoot on the SPI lines will be magnified a lot with ringing effects too. Hence, for measurement uses a ground clip very short (say 1-2 cm) and have ground reference very close to the measuring point. Assuming 20 MHz maximum operating frequency, the high and low level duration will be 25 ns. Assuming 4 time constants, the allowed time constant is 6 ns. Hence the capacitor value can be at max of 6 ns / 33.2 ohms =  37 pF. Assuming hidden 8-10 pF of capacitor, the capacitor which is being placed cannot be more than 20 pF. Capacitor value can be tweaked for best results for the typical application.

hardware design engineer - interfaces list

As a hardware design engineer, till now I have interfaced following items and I must learn all of them again:

1. UART
2. RS232
3. RS485
4. RS422
5. USB
6. Ethernet
7. GSM SIM
8. SDRAM
9. DDR 3
10. Parallel Nor Flash
11. Nand Flash
12. SPI Nor Flash
13. EEPROM
14. Temperature Sensor IC
15. External Crystal
16. Decoupling capacitors
17. High sped digital lines routing
18. mPCIe interface
19. Zigbee
20. GSM
21. FPGA
22. Slave FIFO interface
23. Pullups and pull down resistors
24. Stitching capacitors
25. PCB design
26. Analog and digital ground planes
27. Terminations
28. RC delay for reset Pins and IO pins
29. ESD protection
30. Reset switch interface
31. Schematics presentation - Pur cosmetics
32. Capacitors
33. Resistors
34. Mosfets
35. LEDs
36. Push to on Push to off circuit
37. Choosing ADC
38. ADC interface
39. DAC interface
40. SPI to UART IC
41. SPI interface
42. I2C interface
43. Three wire interface
44. Two wire interface
45. EMI precautions for digital interfaces
46. Booting of Blackfin Processor
47. eMMC interface
48. Open collector/Open drain
49. Series RLC Circuit
50. Routing clock lines
51. list will be updated..

Hardware design engineer - Getting started

Dear Reader,

I took real b**l s**t from my boss here for the first design i had made in my new company. I am very unhappy. I want to start it all over again. all my understandings, learning, Design presentation, reasoning, decision everything..

Just a little background of my career experience.. have gone through all the basic interfaces around a 32 bit processor. Had read so many whitepapers and guidelines and was feeling confident about the knowledge. I thought I am smart enough to design new things. But today's meeting settled that.


So, my mission is to learn all the things(!!) related to hardware design which makes an engineer Mr Perfect.. Would like to put all my learning in a blog so that it might help other person one-day. Thinking to present my learning in a very practical way how I should have done it starting from requirements gathering to deploying the design to the most best known reviewer. Wish me luck..